Resources

This note describes a technique for measuring the s-parameters of SMT devices using a low cost FR4 test jig and the LA19-13-03 8 GHz VNA. The jig includes the calibration Standards needed to carry out the VNA calibration to remove the effects of the jig.

This note describes the calculated uncertainties of the LA19-13-03 Vector Network Analyser. The calculations are based on actual measurements and represent a good indication of the capability of the instrument.

Investigation of the effects of sampling on the loop response and phase noise performance of Phase Locked Loops (PLLs). These effects are often ignored in continuous-time models used by simulations. This paper shows why modelling the effects of sampling is important, especially when the loop bandwidth is large.

Analysis of phase noise in sampled phase locked loops. This paper provides an in-depth analysis of the characteristics of sampled PLLs and in particular highlights the effects on phase noise at the sampling or comparison frequency.

Applications Note LAP03 describes calibration procedures for the LA19-13-02 Low  cost Vector Network Analyser including use of the Iss2 calibration kits which enable a full calibration to be carried out with a single kit when the DUT is non-insertable. It also describes the measurement uncertainties.

The calibration and measurement uncertainties of the LA19-13-01 Low cost Vector Network Analyser are assessed jointly by the UK’s National Physical Laboratory and LA Techniques Ltd., The Note also contains applications information.

This Technical Note takes a look at the background to the bandwidth and phase linearity requirements of high speed driver amplifiers. It also describes popular amplifier circuit techniques and construction technologies used to realize high performance driver amplifiers.

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